It was satisfied for performance testing of high-speed A/D circuit in the project assess The factors of reducing a high speed A/D circuit performance were found out, such as harmonic distorted in front analog circuit, .sample clock shaking, analog power a
It was satisfied for performance testing of high-speed A/D circuit in the project assess The factors of reducing a high speed A/D circuit performance were found out, such as harmonic distorted in front analog circuit, .sample clock shaking, analog power a
并在试验测试的基础上找出了影响高速模数转换电路转换性能的几个主要的因素，即：前端运放电路谐波失真、采样时钟抖动、模数电源及共地噪声串扰等。