Our basic idea is to make use of the permissible clock skew to enhance the timing reliability of a circuit.
Our basic idea is to make use of the permissible clock skew to enhance the timing reliability of a circuit.
我们的基本想法，是利用可允许的时序差异值来提高电路的时序可靠度。
Our basic idea is to make use of the permissible clock skew to enhance the timing reliability of a circuit.
我们的基本想法，是利用可允许的时序差异值来提高电路的时序可靠度。